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Celoxica Releases C Synthesis Toolkit for Altera SOPC Builder

DK Accelerator Implements C-language Algorithms Directly to FPGA Hardware In Integrated Altera SOPC Design Flow

CAMPBELL, Calif.—(BUSINESS WIRE)—May 24, 2004— Celoxica, Ltd., the technology leader in C-based synthesis and system-level design, today announced availability of the DK Accelerator for Altera's SOPC Builder. The DK Accelerator generates FPGA hardware components directly from Handel-C descriptions for use in the SOPC Builder system development tool. The DK Accelerator, combined with SOPC Builder, provides a fast, seamless and automated implementation path for C-language algorithms to system-on-a-programmable chip (SOPC) designs.

SOPC Builder, an automated system-integration tool included within the Altera Quartus II design software, lets system designers define and implement an SOPC design by specifying the building blocks or components. The Celoxica DK Accelerator for the SOPC Builder tool enhances this flow by automatically generating SOPC Builder components directly from C-language descriptions of custom algorithms. For each algorithm, the tool automatically converts the software into FPGA logic that the SOPC Builder tool can integrate along with other components to provide critical product differentiation. The created components can be used and re-used in the same manner as other off-the-shelf components.

"The DK Accelerator gives users a direct path to move their custom algorithms and C-language descriptions into FPGA logic. SOPC Builder provides the hardware integration tool to create a working system without the need for an HDL designer," said Joe Hanson, Altera's marketing director for system-level development tools. "Adoption of ESL design requires the application of higher-levels of abstraction in ways that complement how designers actually think and work. The combination of Celoxica synthesis with SOPC Builder integration provides this type of natural extension."

The DK Accelerator for SOPC Builder tool provides cycle-accurate simulation and synthesis of algorithms to Altera FPGA devices from Handel-C, a superset of ANSI-C for hardware synthesis. The toolkit also includes automatic generation of SOPC Builder component interfaces and an API for component interaction with an embedded processor.

"Whether for acceleration, for design flexibility or for prototyping, designers are choosing FPGA devices to implement complex system algorithms," said Jeff Jussel, vice-president of marketing for Celoxica. "Combining Celoxica C-language synthesis with the ease of integration of SOPC Builder provides Altera users with a unique and fast path to the realization of those algorithms."

About Celoxica

An innovator in system-level electronic design automation (EDA), Celoxica supplies the design technology, IP and services that define Software-Compiled System Design, a methodology that exploits higher levels of design abstraction to dramatically improve silicon design productivity. Celoxica's products address hardware/software partitioning, co-verification and C-based synthesis to reconfigurable hardware. Established in 1996, Celoxica offers a proven route from complex software algorithms to hardware, and provides an ideal design environment for reconfigurable electronics with significant productivity advantages for digital signal processing applications such as imaging, electronic security and communications. For more information, visit: www.celoxica.com.

Celoxica and the Celoxica logo are trademarks of Celoxica, Ltd. All other brand names and product names are the property of their respective owners.



Contact:
Celoxica Ltd.
Jeff Jussel, 408-626-9070
jeff.jussel@celoxica.com
or
VitalCom Marketing & PR
Karen Tyrrell, 650-366-8212 x204
Karen@vitalcompr.com
or
Neesham PR
Allan Edwards, +44-1442-879-222
allane@neesham.com

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